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  • MultiplyShiftR
  • MultiplyShiftRX
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Hash Functions

Contents

  • MultiplyShiftR
  • MultiplyShiftRX

MultiplyShiftR

  • Slim
  • Expanded
uint32_t
IndexMultiplyShiftR(
    uint32_t Key
    )
{
    uint32_t Vertex1;
    uint32_t Vertex2;

    Vertex1 = ((Key * SEED1) >> SEED3_BYTE1) & HASH_MASK;
    Vertex2 = ((Key * SEED2) >> SEED3_BYTE2) & HASH_MASK;

    return (Assigned[Vertex1] + Assigned[Vertex2]) & INDEX_MASK;
}
#include <stdint.h>

#define SEED1 0x20190903
#define SEED2 0x19811025
#define SEED3_BYTE1 0x10
#define SEED3_BYTE2 0x7
#define HASH_MASK (uint32_t)0xffff
#define INDEX_MASK (uint32_t)0x7fff

extern uint32_t Assigned[];

uint32_t
IndexMultiplyShiftR(
    uint32_t Key
    )
{
    uint32_t Vertex1;
    uint32_t Vertex2;

    Vertex1 = (((Key * SEED1) >> SEED3_BYTE1) & HASH_MASK;
    Vertex2 = (((Key * SEED2) >> SEED3_BYTE2) & HASH_MASK;

    return (Assigned[Vertex1] + Assigned[Vertex2]) & INDEX_MASK;
}

MultiplyShiftRX

  • Slim
  • Expanded
  • Assembly
  • LLVM MCA
uint32_t
IndexMultiplyShiftRX(
    uint32_t Key
    )
{
    uint32_t Vertex1;
    uint32_t Vertex2;

    Vertex1 = ((Key * SEED1) >> SEED3_BYTE1);
    Vertex2 = ((Key * SEED2) >> SEED3_BYTE2);

    return (Assigned[Vertex1] + Assigned[Vertex2]) & INDEX_MASK;
}
#include <stdint.h>

#define SEED1 0x20190903
#define SEED2 0x19811025
#define SEED3_BYTE1 0x10
#define SEED3_BYTE2 0x7
#define INDEX_MASK (uint32_t)0x7fff

extern uint32_t Assigned[];

uint32_t
IndexMultiplyShiftRX(
    uint32_t Key
    )
{
    uint32_t Vertex1;
    uint32_t Vertex2;

    Vertex1 = ((Key * SEED1) >> SEED3_BYTE1);
    Vertex2 = ((Key * SEED2) >> SEED3_BYTE2);

    return (Assigned[Vertex1] + Assigned[Vertex2]) & INDEX_MASK;
}

IndexMultiplyShiftRX(unsigned int):
        imul    ecx, edi, 538511619
        imul    eax, edi, 427888677
        shr     ecx, 16
        lea     rdx, [rip + Assigned]
        shr     eax, 7
        mov     eax, dword ptr [rdx + 4*rax]
        add     eax, dword ptr [rdx + 4*rcx]
        and     eax, 32767
        ret
Iterations:        100
Instructions:      1400
Total Cycles:      413
Total uOps:        1600

Dispatch Width:    4
uOps Per Cycle:    3.87
IPC:               3.39
Block RThroughput: 4.0


Instruction Info:
[1]: #uOps
[2]: Latency
[3]: RThroughput
[4]: MayLoad
[5]: MayStore
[6]: HasSideEffects (U)

[1]    [2]    [3]    [4]    [5]    [6]    Instructions:
 1      3     1.00                        imul  ecx, edi, 538511619
 1      3     1.00                        imul  eax, edi, 427888677
 1      1     0.50                        shr   ecx, 16
 1      1     0.50                        lea   rdx, [rip + Assigned]
 1      1     0.50                        shr   eax, 7
 1      5     0.50    *                   mov   eax, dword ptr [rdx + 4*rax]
 2      6     0.50    *                   add   eax, dword ptr [rdx + 4*rcx]
 1      1     0.33                        and   eax, 32767
 1      1     1.00                  U     ret
 1      1     0.50                        lea   rax, [rip + Assigned]
 1      5     0.50    *                   mov   eax, dword ptr [rax + 79726608]
 2      6     0.50    *                   add   eax, dword ptr [rip + Assigned+1600]
 1      1     0.33                        and   eax, 32767
 1      1     1.00                  U     ret


Resources:
[0]   - SBDivider
[1]   - SBFPDivider
[2]   - SBPort0
[3]   - SBPort1
[4]   - SBPort4
[5]   - SBPort5
[6.0] - SBPort23
[6.1] - SBPort23


Resource pressure per iteration:
[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  
 -      -     3.99   4.01    -     4.00   2.00   2.00   

Resource pressure by instruction:
[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  Instructions:
 -      -      -     1.00    -      -      -      -     imul    ecx, edi, 538511619
 -      -      -     1.00    -      -      -      -     imul    eax, edi, 427888677
 -      -     0.74    -      -     0.26    -      -     shr ecx, 16
 -      -     0.76   0.24    -      -      -      -     lea rdx, [rip + Assigned]
 -      -     0.04    -      -     0.96    -      -     shr eax, 7
 -      -      -      -      -      -      -     1.00   mov eax, dword ptr [rdx + 4*rax]
 -      -     0.28   0.01    -     0.71   1.00    -     add eax, dword ptr [rdx + 4*rcx]
 -      -     0.93   0.04    -     0.03    -      -     and eax, 32767
 -      -      -      -      -     1.00    -      -     ret
 -      -     0.27   0.73    -      -      -      -     lea rax, [rip + Assigned]
 -      -      -      -      -      -      -     1.00   mov eax, dword ptr [rax + 79726608]
 -      -     0.03   0.96    -     0.01   1.00    -     add eax, dword ptr [rip + Assigned+1600]
 -      -     0.94   0.03    -     0.03    -      -     and eax, 32767
 -      -      -      -      -     1.00    -      -     ret
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